1. Field of the Invention
This invention relates to a line image generating apparatus and, in particular, to such an apparatus suitable for generating a line image having a pattern in computer graphics.
2. Description of the Prior Art
An existing apparatus for generating a line image with a certain pattern is shown in FIG. 1.
The line image generating apparatus 51 shown in FIG. 1 is used for expressing a line, for example, in the form of a broken line. The line image generating apparatus 51 outputs line pattern information as shown in FIG. 2 as a rendering control signal, for example, for each bit. In FIG. 2, "0" is attached to pixels of a line not to be rendered while "1" is attached to pixels to be rendered.
In the construction of FIG. 1, the line image generating apparatus 51 consists mainly of a line pattern register (hereinafter called LP register) 52, a counter 53, and a selector 54. The LP register has a capacity of 32 bits and holds line pattern information as shown in FIG. 2 while assigning it to the respective bits. An output from the LP register 52 is applied to the selector 54 by sending 32 bits in parallel.
The counter 53 counts a predetermined clock signal to produce a count value. The count value form the counter 53 is supplied to the selector 54 to behave as a select signal SSL of five bits. The selector 54 selects, from the 32-bit pattern information from the LP register 52, data on one bit in a position designated by the select signal SSL. The one-bit data is taken out from a terminal 55 to behave as a rendering control signal DCO. On the basis of the rendering control signal DCO, a next-stage circuit determines whether to render the corresponding pixel or not.
An example in which a segment is rendered by using the line image generating apparatus 51 is explained below with reference to FIG. 3. If the line pattern information given is as shown under the X axis in FIG. 3, pixels in portions of the line corresponding to bits indicated by "0" in the pattern information are not rendered, while pixels in portions of the line corresponding to bits indicated by "1" in the pattern information are rendered.
In FIG. 3, in the case of lines LO1 to LO3, the X axis is the major axis for lines LO1 to LO3, and the counter 53 increments its count value every time when the process makes progress by one step in the X axis direction. In the case of lines LO4 and LO5, the Y axis is the major axis, and the counter 53 increments its count value every time when the process makes progress by one step in the Y axis direction. As shown in FIG. 3, when any bit in the pattern information is indicated by "0", the lines LO1 to LO5 are displayed, without rendering their pixels corresponding to such bits.
In the line image generating apparatus 51 described above, the select signal SSL for selecting pattern information is created by the counter 53. Therefore, a selected bit in the pattern information is shifted by one bit in each one-step progress, and the pattern represented by the lines LO1 to LO5 rendered varies with inclination of the lines.
Let an example be taken in which lines are rendered on the basis of the same pattern information shown in FIG. 2. As shown in FIG. 3, when the lines LO1 to LO5 have the same start point, each of distances of non-rendered areas AR40 and AR41 from the start point (the origin in the example of FIG. 3) varies with inclinations of the lines LO1 to LO5. Therefore, each of the non-rendered areas AR40 and AR41 represents a reversed L shape, as a whole, which is not a good appearance. In order to improve the appearance of the line, processing by software is employed. However, such processing, which relies upon software increases the amount of operations and decreases the processing speed.